M54HC73D datasheet(1/11 Pages) STMICROELECTRONICS

No. de pieza	M54HC73D

Descripción Electrónicos	RAD HARD DUAL J-K FLIP FLOP WITH PRESET AND CLEAR

PDF	11 Pages

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Fabricante Electrónico	STMICROELECTRONICS [STMicroelectronics]

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June 2004

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HIGH SPEED:

fMAX = 80MHz (TYP.) at VCC =6V

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LOW POWER DISSIPATION:

ICC =2µA(MAX.) at TA=25°C

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HIGH NOISE IMMUNITY:

VNIH =VNIL = 28% VCC (MIN.)

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SYMMETRICAL OUTPUT IMPEDANCE:

|IOH|= IOL =4mA (MIN)

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BALANCED PROPAGATION DELAYS:

tPLH ≅ tPHL

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WIDE OPERATING VOLTAGE RANGE:

VCC (OPR) = 2V to 6V

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PIN AND FUNCTION COMPATIBLE WITH

54 SERIES 73

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SPACE GRADE-1: ESA SCC QUALIFIED

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50 krad QUALIFIED, 100 krad AVAILABLE ON

REQUEST

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NO SEL UNDER HIGH LET HEAVY IONS

IRRADIATION

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DEVICE FULLY COMPLIANT WITH

SCC-9203-071

DESCRIPTION

The M54HC73 is an high speed CMOS DUAL J-K

FLIP FLOP WITH CLEAR fabricated with silicon

gate C2MOS technology.

Depending on the logic level applied to J and K

inputs, this device changes state on the negative

going transition of clock input pulse (CK). The

clear function is accomplished independently of

the clock condition when the clear input (CLR)is

taken low.

All inputs are equipped with protection circuits

against static discharge and transient excess

voltage.

M54HC73

RAD HARD DUAL J-K FLIP FLOP WITH PRESET AND CLEAR

PIN CONNECTION

ORDER CODES

PACKAGE

FM

EM

DILC

M54HC73D

M54HC73D1

FPC

M54HC73K

M54HC73K1

Rev. 1

DILC-14

FPC-14

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M54HC73D Datasheet(PDF) 1 Page - STMicroelectronics

M54HC73D Datasheet(HTML) 1 Page - STMicroelectronics

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