M54HC595 datasheet(1/15 Pages) STMICROELECTRONICS

No. de pieza	M54HC595

Descripción Electrónicos	RAD-HARD 8 BIT SHIFT REGISTER WITH OUTPUT LATCHES (3 STATE)

PDF	15 Pages

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Fabricante Electrónico	STMICROELECTRONICS [STMicroelectronics]

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June 2004

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HIGH SPEED:

fMAX = 59MHz (TYP.) at VCC =6V

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LOW POWER DISSIPATION:

ICC =4µA(MAX.) at TA=25°C

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HIGH NOISE IMMUNITY:

VNIH =VNIL = 28% VCC (MIN.)

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SYMMETRICAL OUTPUT IMPEDANCE:

|IOH|= IOL = 6mA (MIN.) FOR QA to QH

|IOH|= IOL = 4mA (MIN.) FOR QH’

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BALANCED PROPAGATION DELAYS:

tPLH ≅ tPHL

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WIDE OPERATING VOLTAGE RANGE:

VCC (OPR) = 2V to 6V

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PIN AND FUNCTION COMPATIBLE WITH

54 SERIES 595

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SPACE GRADE-1: ESA SCC QUALIFIED

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50 krad QUALIFIED, 100 krad AVAILABLE ON

REQUEST

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NO SEL UNDER HIGH LET HEAVY IONS

IRRADIATION

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DEVICE FULLY COMPLIANT WITH

SCC-9306-051

DESCRIPTION

The M54HC595 is an high speed CMOS 8-BIT

SHIFT

REGISTERS/OUTPUT

LATCHES

(3-STATE) fabricated with silicon gate C2MOS

technology.

This device contains an 8-bit serial-in, parallel-out

shift register that feeds an 8-bit D-type storage

register. The storage register has 8 3-STATE

outputs. Separate clocks are provided for both the

shift register and the storage register.

The shift register has a direct-overriding clear,

serial input, and serial output (standard) pins for

cascading. Both the shift register and storage

register use positive-edge triggered clocks. If both

clocks are connected together, the shift register

state will always be one clock pulse ahead of the

storage register.

All inputs are equipped with protection circuits

against static discharge and transient excess

voltage.

M54HC595

RAD-HARD 8 BIT SHIFT REGISTER

WITH OUTPUT LATCHES (3 STATE)

PIN CONNECTION

ORDER CODES

PACKAGE

FM

EM

DILC

M54HC595D

M54HC595D1

FPC

M54HC595K

M54HC595K1

DILC-16

FPC-16

Rev. 1

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Descripción similar - M54HC595

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M54HC595 Datasheet(PDF) 1 Page - STMicroelectronics

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