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ESDALC6V1C2 Datasheet(PDF) 5 Page - STMicroelectronics

No. de pieza ESDALC6V1C2
Descripción Electrónicos  Quad low capacitance TRANSIL array for ESD protection
PDF  7 Pages
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Fabricante Electrónico  STMICROELECTRONICS [STMicroelectronics]
Página de inicio  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

ESDALC6V1C2 Datasheet(HTML) 5 Page - STMicroelectronics

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ESDALC6V1C2
Ordering information
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Figure 9.
Flip-Chip tape and reel specifications
In order to meet environmental requirements, ST offers these devices in ECOPACK®
packages. These packages have a lead-free second level interconnect. The category of
second level interconnect is marked on the package and on the inner box label, in
compliance with JEDEC Standard JESD97. The maximum ratings related to soldering
conditions are also marked on the inner box label. ECOPACK is an ST trademark.
ECOPACK specifications are available at: www.st.com.
4
Ordering information
Figure 7.
Flip-Chip footprint
Figure 8.
Marking
Copper pad Diameter :
250µm recommended , 300µm max
Solder stencil opening : 330µm
Solder mask opening recommendation :
340µm min for 315µm copper pad diameter
Dot, ST logo
xx = marking
yww = datecode
(y = year ww = week)
z = manufacturing location
x
y
x
w
z
w
E
Dot identifying Pin A1 location
User direction of unreeling
All dimensions in mm
4 ± 0.1
4 ± 0.1
Ø 1.5 ± 0.1
0.73 ± 0.05
xxz
yww
ST
xxz
yww
ST
xxz
yww
ST
E
E
E
Part number
Marking
Package
Weight
Base qty
Delivery mode
ESDALC6V1C2
ED
Flip-Chip
2.1 mg
5000
Tape and reel



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