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STDVE103A Datasheet(PDF) 39 Page - STMicroelectronics |
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STDVE103A Datasheet(HTML) 39 Page - STMicroelectronics |
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39 / 43 page ![]() STDVE103A Application information 39/43 6.3.1 I2C lines application information A typical application is shown in the figure below. In the example, the system master is running on a 3.3 V I2C-bus while the slave is connected to a 5 V bus. Both buses run at 100 kHz unless the slave bus is isolated and then the master bus can run at 400 kHz. Master devices can be placed on either bus. Figure 20. Typical application of I2C bus system The STDVE103A DDC lines are 5 V tolerant; so it does not require any extra circuitry to translate between the different bus voltages. 3.3V 5.0V SDA SCL SDA SCL SDA SDA SCL SCL STDVE103A SEL SHDN_N BUS 0 BUS 1 Bus Master 400 kHz Slave 100 kHz AM00712V1 |
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