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EVAL-ADE7566F16EB Datasheet(PDF) 57 Page - Analog Devices

No. de pieza EVAL-ADE7566F16EB
Descripción Electrónicos  Single-Phase Energy Measurement IC with 8052 MCU, RTC, and LCD Driver
PDF  136 Pages
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EVAL-ADE7566F16EB Datasheet(HTML) 57 Page - Analog Devices

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Preliminary Technical Data
ADE7566/ADE7569
Rev. PrA | Page 57 of 136
When SAVARM in the ACCMODE Register (0x0F) is set, the
reactive power is accumulated depending on the sign of the
active power. When active power is positive, the reactive power
is added as it is to the reactive energy register. When active
power is negative, the reactive power is subtracted from the
reactive energy accumulator (see the VAR Anti-Tamper
Accumulation Mode section).
When ABSVARM in the ACCMODE Register (0x0F) is set, the
absolute reactive power is used for the reactive energy accumu-
lation (see the VAR Absolute Accumulation Mode section).
The output of the multiplier is divided by VARDIV. If the value
in the VARDIV register is equal to 0, the internal reactive
energy register is divided by 1. VARDIV is an 8-bit, unsigned
register. After dividing by VARDIV, the reactive energy is
accumulated in a 49-bit internal energy accumulation register.
The upper 24 bits of this register are accessible through a read
to the reactive energy register (VARHR[23:0]). A read to the
RVARHR register returns the content of the VARHR register,
and the upper 24 bits of the internal register are cleared.
As shown in Figure 58, the reactive power signal is accumulated
in an internal 49-bit signed register. The reactive power signal
can be read from the waveform register by setting the WAVMODE
Register (0x0D) and setting the WFSM bit in the Interrupt Enable
Register 3 SFR (MIRQENH, 0xDB). Like the current and
voltage channel waveform sampling modes, the waveform date is
available at sample rates of 27.9 kSPS, 14 kSPS, 7 kSPS, or 3.5
kSPS.
Figure 53 shows this energy accumulation for full-scale signals
(sinusoidal) on the analog inputs. These curves also apply for
the reactive energy accumulation
Note that the energy register contents rolls over to full-scale
negative (0x800000) and continues to increase in value when
the power or energy flow is positive. Conversely, if the power is
negative, the energy register underflows to full-scale positive
(0x7FFFFF) and continues to decrease in value.
By using the interrupt enable register, the ADE7569 can be
configured to issue an ADE interrupt to the 8052 core when the
reactive energy register is half-full (positive or negative) or
when an overflow or underflow occurs.
VARGAIN[11:0]
VARDIV[7:0]
LPF2
CURRENT
CHANNEL
VOLTAGE
CHANNEL
TIME (nT)
5
CLKIN
T
REACTIVE POWER
SIGNAL
+
+
VARHR[23:0]
UPPER 24 BITS ARE
ACCESSIBLE THROUGH
VARHR[23:0] REGISTER
23
0
48
0
WAVEFORM
REGISTER
VALUES
%
VAROS[15:0]
26
sgn
25
2–6 2–7 2–8
+
+
FOR WAVEFORM
SAMPLING
HPF
Π
2
PHCAL[7:0]
90° PHASE
SHIFTING FILTER
OUTPUTS FROM THE LPF2 ARE
ACCUMULATED (INTEGRATED) IN
THE INTERNAL REACTIVE ENERGY
REGISTER
TO
DIGITAL-TO-FREQUENCY
CONVERTER
Figure 58.. Reactive Energy Calculation



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