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ST72589BW Datasheet(PDF) 32 Page - STMicroelectronics

No. de pieza ST72589BW
Descripción Electrónicos  8-BIT MCU WITH NESTED INTERRUPTS, DOT MATRIX LCD, ADC, TIMERS, PWM-BRM, SPI, SCI, I²C, CAN INTERFACES
PDF  158 Pages
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Fabricante Electrónico  STMICROELECTRONICS [STMicroelectronics]
Página de inicio  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

ST72589BW Datasheet(HTML) 32 Page - STMicroelectronics

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POWER SAVING MODES (Cont’d)
4.2.4 SLOW Mode
This mode has two targets:
– To reduce power consumption by decreasing the
internal clock in the device,
– To adapt the internal clock frequency (fCPU) to
the available supply voltage.
SLOW mode is controlled by three bits in the main
oscillator CSR register: the SMS bit which enables
or disables Slow mode and two CPx bits which se-
lect the internal slow frequency (fCPU).
In this mode, the oscillator frequency can be divid-
ed by 4, 8, 16 or 32 instead of 2 in normal operat-
ing mode. The CPU and peripherals (except CAN,
see Note) are clocked at this lower frequency.
Note: Before entering SLOW mode and in order to
guarantee low power operation, the CAN peripher-
al must be placed by software in STANDBY mode.
Figure 21. SLOW Mode: timing diagram for internal CPU clock transitions
00
01
0
1
SMS
CP1:0
fCPU
fOSC/8
fOSC/4
NEW FREQUENCY
REQUEST
NEW FREQUENCY
ACTIVE WHEN
OSC/4 & OSC/8 = 0
NORMAL MODE
REQUEST
NORMAL MODE ACTIVE
(OSC/4, OSC/8 STOPPED)
MAIN
OSILLATOR
CSR



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