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ADP150WACBZ-2.5-R7 Datasheet(PDF) 4 Page - Analog Devices

No. de pieza ADP150WACBZ-2.5-R7
Descripción Electrónicos  Ultralow Noise, 150 mA, CMOS Linear Regulator
PDF  20 Pages
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Fabricante Electrónico  AD [Analog Devices]
Página de inicio  http://www.analog.com
Logo AD - Analog Devices

ADP150WACBZ-2.5-R7 Datasheet(HTML) 4 Page - Analog Devices

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Data Sheet
ADP150
SPECIFICATIONS
analog.com
Rev. E | 4 of 20
Table 1. (Continued)
Parameter
Symbol
Test Conditions/Comments
Min
Typ
Max
Unit
EN Input Leakage Current
VI-LEAKAGE
EN = IN or GND
0.001
µA
EN = IN or GND, TJ = −40°C to +125°C
1
µA
OUTPUT NOISE
OUTNOISE
10 Hz to 100 kHz, VIN = 5 V, VOUT = 3.3 V
9
µV rms
10 Hz to 100 kHz, VIN = 5 V, VOUT = 2.5 V
9
µV rms
10 Hz to 100 kHz, VIN = 5 V, VOUT = 1.8 V
9
µV rms
POWER SUPPLY REJECTION RATIO
PSRR
10 kHz, VIN = 3.8 V, VOUT = 3.3 V, IOUT = 10 mA
70
dB
(VIN = VOUT + 0.5 V)
10 kHz, VIN = 2.3 V, VOUT = 1.8 V, IOUT = 10 mA
70
dB
100 kHz, VIN = 3.8 V, VOUT = 3.3 V, IOUT = 10 mA
55
dB
100 kHz, VIN = 2.3 V, VOUT = 1.8 V, IOUT = 10 mA
55
dB
POWER SUPPLY REJECTION RATIO
10 kHz, VIN = 4.3 V, VOUT = 3.3 V, IOUT = 10 mA
70
dB
(VIN = VOUT + 1 V)
100 kHz, VIN = 4.3 V, VOUT = 3.3 V, IOUT = 10 mA
55
dB
1 Based on an end-point calculation using 1 mA and 150 mA loads. See Figure 6 for typical load regulation performance for loads less than 1 mA.
2 Dropout voltage is defined as the input-to-output voltage differential when the input voltage is set to the nominal output voltage. This applies only for output voltages above
2.2 V.
3 Start-up time is defined as the time between the rising edges of EN to VOUT being at 90% of its nominal value.
4 Current limit threshold is defined as the current at which the output voltage drops to 90% of the specified typical value. For example, the current limit for a 3.0 V output
voltage is defined as the current that causes the output voltage to drop to 90% of 3.0 V or 2.7 V.
RECOMMENDED SPECIFICATIONS: INPUT AND OUTPUT CAPACITOR
Table 2.
Parameter
Symbol
Test Conditions/Comments
Min
Typ
Max
Unit
INPUT AND OUTPUT CAPACITOR
Minimum Input and Output Capacitance1
CMIN
TA = −40°C to +125°C
0.7
µF
Capacitor ESR
RESR
TA = −40°C to +125°C
0.001
0.2
Ω
1 The minimum input and output capacitance should be greater than 0.7 µF over the full range of operating conditions. The full range of operating conditions in the
application must be considered during device selection to ensure that the minimum capacitance specification is met. X7R-type and X5R-type capacitors are recommended,
and Y5V and Z5U capacitors are not recommended for use with any LDO.



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