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ADG726BCPZ Datasheet(PDF) 13 Page - Analog Devices |
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ADG726BCPZ Datasheet(HTML) 13 Page - Analog Devices |
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13 / 21 page ![]() Data Sheet ADG726/ADG732 Rev. C | Page 13 of 21 S12 S11 S10 S9 S8 S7 S6 S5 S4 S3 S2 S1 NOTES 1. NIC = NOT INTERNALLY CONNECTED. DO NOT CONNECT TO THIS PIN. 2. THE EXPOSED PAD MUST BE CONNECTED TO GND. 36 S28 35 S27 34 S26 33 S25 32 S24 31 S23 30 S22 29 S21 28 S20 27 S19 26 S18 25 S17 1 2 3 4 5 6 7 8 9 10 11 12 ADG732 TOP VIEW (Not to Scale) Figure 7. ADG732 Pin Configuration Table 9. ADG732 Pin Function Description Pin No. Mnemonic Description 1 to 12, 45 to 48 S16 to S1 Source Terminal. This pin may be an input or output. 13, 14 VDD Most Positive Power Supply Potential. 15 to 19 A0 to A4 Logic Control Inputs. 20 CS Chip Select Pin. CS is active low. 21 WR Write Pin. When WR is low, the logic control inputs (A0 to A4) control which state the switches are in. On the rising edge of WR, the logic control input data is latched. 22 EN Active Low, Digital Input. When this pin is high, the device is disabled and all switches are off. When this pin is low, the Ax logic control inputs determine the on switches. The EN input signal is not latched by WR. 23 GND Ground (0 V) Reference. 24 VSS Most Negative Power Supply in a Dual-Supply Application. In single-supply applications, connect this pin to GND. 25 to 40 S17 to S32 Source Terminal. This pin may be an input or output. 41, 42, 44 NIC Not Internally Connected. Do not connect to this pin. 43 D Drain Terminal. This pin may be an input or output. EPAD Exposed Pad. The exposed pad must be connected to GND. Truth Tables Table 10. ADG726 Truth Table A31 A21 A11 A01 EN1 CSA CSB WR1 On Switch X X X X X 1 1 L → H Latches control input data X X X X X 1 1 X No change in switch condition X X X X 1 X X X None 0 0 0 0 0 0 0 0 S1A to DA, S1B to DB 0 0 0 1 0 0 0 0 S2A to DA, S2B to DB 0 0 1 0 0 0 0 0 S3A to DA, S3B to DB 0 0 1 1 0 0 0 0 S4A to DA, S4B to DB 0 1 0 0 0 0 0 0 S5A to DA, S5B to DB 0 1 0 1 0 0 0 0 S6A to DA, S6B to DB 0 1 1 0 0 0 0 0 S7A to DA, S7B to DB 0 1 1 1 0 0 0 0 S8A to DA, S8B to DB 1 0 0 0 0 0 0 0 S9A to DA, S9B to DB 1 0 0 1 0 0 0 0 S10A to DA, S10B to DB 1 0 1 0 0 0 0 0 S11A to DA, S11B to DB 1 0 1 1 0 0 0 0 S12A to DA, S12B to DB |
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