AD2437 datasheet(20/42 Pages) AD

20 / 42 page

Rev. 0

Page 20 of 42

July 2023

AD2437

Table 7. I2S Target (A2B Main Node) DTXn Enable and Three-State Timing

IOVDD = 1.8 V

IOVDD = 3.3 V

Unit

Parameter

Min

Max

Min

Max

Switching Characteristics

tDOENM

DTXn Data Enable Delay After BCLK Drive Edge

5.0

4.0

tDODIM

DTXn Data Disable Delay After BCLK Drive Edge

14.5

10.5

1 Refer to the A2B_TXOFFSET register for three-state programming details.

Figure 18. I2S Target (A2B Main Node) DTXn Enable and Three-State Timing

Table 8. Pulse Density Modulation (PDM) Microphone Input Timing

IOVDD = 1.8 V

IOVDD = 3.3 V

Parameter

Min

Max

Min

Max

Unit

Timing Requirements

tPDMSS

PDMn Input Setup Before BCLK/PDMCLK

17.5

12.0

tPDMHS

PDMn Input Hold After BCLK/PDMCLK

Switching Characteristics

fPDMCLK

BCLK/PDMCLK Output Frequency at fSYNC = 48 kHz

3.040

3.104

3.040

3.104

MHz

tPDMCLKOJ

BCLK/PDMCLK Output Jitter RMS Cycle to Cycle

150

tPDMCLKW

BCLK/PDMCLK Output Pulse Width

161.0

162.5

Figure 19. PDM Timing

DRIVE EDGE

tDOENM

tDODIM

TRANSMIT DATA

(DTXn) CHANNEL

BCLK

DRIVE EDGE

SAMPLE EDGE

tPDMHS

tPDMCLKW

tPDMSS

RECEIVE PDMn

DATA CHANNEL

BCLK/PDMCLK

PDMn (MIC-0)

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