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R7FA6T2AB3CFP Datasheet(PDF) 41 Page - Renesas Technology Corp |
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R7FA6T2AB3CFP Datasheet(HTML) 41 Page - Renesas Technology Corp |
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41 / 101 page  GTETRGn input (n = A to D) GPT output pins Outputs disabled tPOEGDDI tPOEGW Figure 2.21 Output Disable Time for POEG in Direct Response to the Input Level Detection of the GTETRGn pin ACMPHSn level detection signal (n = 0 to 3) GPT output pins Outputs disabled tPOEGDDC Figure 2.22 Output Disable Time for POEG in Response to Level Detection Signal from ACMPHS Input capture tGTICW Figure 2.23 GPT input capture timing GPT output GTCLK tGTISK Output delay Figure 2.24 GPT output delay skew RA6T2 Datasheet 2. Electrical Characteristics R01DS0400EJ0150 Rev.1.50 Jul 2, 2025 Page 41 of 101 |
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