AS3722 datasheet(135/199 Pages) AMSOSRAM

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Page 134

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[v1-01] 2015-Sep-07

AS3722 − Register Description

Figure 137:

ResetControl

3:1

clk_int

RW_SM

Sets the internal CLK frequency fCLK used for

Stepdowns, PWM, ...

0 : 4 MHz (default)

1 : 3.8 MHz

2 : 3.6 MHz

3 : 3.4 MHz

4 : 3.2 MHz

5 : 3.0 MHz

6 : 2.8 MHz

7 : 2.6 MHz

All frequencies, timings and delays in this datasheet

are based on 4MHz clk_int

low_power_on

RW_SM

Enable low power mode of internal reference.

0 : Standard mode

1 : Low power mode - all specification except noise

parameters are still valid. Iq reduced by approx.

45uA

Addr:36h

ResetControl

Bit

Bit Name

Default

Access

Bit Description

4:3

reset_debounce

Sets debounce time for RESET_IN

0 : 0.1 ms

1 : 4 ms

2 : 8 ms

3 : 16 ms

onkey_input

R_PUSH

READ : This flag represents the state of the ONkey

pad directly

WRITE : Setting to 1 resets the 2/4/8 sec. Onkey reset

timer

1power_off

RW_SM

Setting to 1 starts a reset cycle, and puts the PMIC

into Power_off state

force_reset

Setting to 1 starts a complete reset cycle

Addr:35h

ReferenceControl

Bit

Bit Name

Default

Access

Bit Description

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