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M41T80 Datasheet(PDF) 11 Page - STMicroelectronics |
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M41T80 Datasheet(HTML) 11 Page - STMicroelectronics |
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11 / 20 page ![]() 11/20 M41T80 Figure 11. Alternative READ Mode Sequence WRITE Mode In this mode the master transmitter transmits to the M41T80 slave receiver. Bus protocol is shown in Figure 12, page 11. Following the START con- dition and slave address, a logic '0' (R/W=0) is placed on the bus and indicates to the addressed device that word address “An” will follow and is to be written to the on-chip address pointer. The data word to be written to the memory is strobed in next and the internal address pointer is incremented to the next address location on the reception of an acknowledge clock. The M41T80 slave receiver will send an acknowledge clock to the master transmitter after it has received the slave address see Figure 9, page 10 and again after it has re- ceived the word address and each data byte. Figure 12. WRITE Mode Sequence AI00895 BUS ACTIVITY: S P SDA LINE BUS ACTIVITY: MASTER DATA n DATA n+1 DATA n+X SLAVE ADDRESS AI00591 BUS ACTIVITY: S P SDA LINE BUS ACTIVITY: MASTER DATA n DATA n+1 DATA n+X WORD ADDRESS (An) SLAVE ADDRESS |
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