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ADCMP564BRQZ Datasheet(PDF) 7 Page - Analog Devices

No. de pieza ADCMP564BRQZ
Descripción Electrónicos  Dual, High Speed ECL Comparators
PDF  16 Pages
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Fabricante Electrónico  AD [Analog Devices]
Página de inicio  http://www.analog.com
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ADCMP564BRQZ Datasheet(HTML) 7 Page - Analog Devices

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ADCMP563/ADCMP564
Rev. B | Page 7 of 16
Pin No.
ADCMP563
16-Lead
QSOP
ADCMP563
16-Lead
LFCSP
ADCMP564
20-Lead
QSOP
Mnemonic
Function
12
10
15
LEB
One of Two Complementary Inputs for Channel B Latch Enable. In compare
mode (logic low), the output tracks change at the input of the comparator.
In latch mode (logic high), the output reflects the input state just prior to the
comparator being placed in the latch mode. LEB must be driven in conjunction
with LEB. If left unconnected, the comparator defaults to compare mode.
13
11
16
LEB
One of Two Complementary Inputs for Channel B Latch Enable. In compare
mode (logic high), the output tracks change at the input of the comparator.
In latch mode (logic low), the output reflects the input state just prior to the
comparator being placed in the latch mode. LEB must be driven in conjunction
with LEB. If left unconnected, the comparator defaults to compare mode.
14
12
17
GND
Analog Ground.
15
13
18
QB
One of Two Complementary Outputs for Channel B. QB is logic low if the
analog voltage at the noninverting input is greater than the analog voltage
at the inverting input (provided the comparator is in compare mode). See
the description of the LEB pin for more information.
16
14
19
QB
One of Two Complementary Outputs for Channel B. QB is logic high if the
analog voltage at the noninverting input is greater than the analog voltage
at the inverting input (provided the comparator is in compare mode). See the
description of the LEB pin for more information.
20
GND
Analog Ground.



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