ADIS16060

Rev. 0 | Page 7 of 12

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

NC

DOUT

SCLK

DIN

AIN2

GND

GND

GND

ADIS16060

TOP

“LOOK THROUGH”

VIEW

(Not to Scale)

16

15

14

13

5

6

7

8

PIN 1

INDICATOR

NOTES

1. NC = NO CONNECT

2. THIS IS NOT AN ACTUAL “TOP VIEW,” AS THE PINS ARE NOT VISIBLE FROM THE

TOP. THIS IS A LAYOUT VIEW, WHICH REPRESENTS THE PIN CONFIGURATION, IF

THE PACKAGE IS LOOKED THROUGH FROM THE TOP. THIS CONFIGURATION IS

PROVIDED FOR PCB LAYOUT PURPOSES.

0.6700 BSC

12×

3.6865 BSC

8×

2.5050 BSC

8×

0.5000 BSC

16×

1.000 BSC

16×

5.010 BSC

4×

7.373 BSC

2×

Figure 4. Pin Configuration

Figure 5. Second-Level Assembly Pad Layout

Table 4. Pin Function Descriptions

Pin No.

Mnemonic

Type1

Description

1

DIN

I

SPI Data Input.

2

SCLK

I

SPI Serial Clock.

3

DOUT

O

SPI Data Output.

4

NC

No Connect.

5

RATE

O

Buffered Analog Output. Represents the angular rate signal.

6

FILT

I

External Capacitor Connection to Control Bandwidth.

7

S

Power Supply.

8

AIN1

I

External Analog Input Channel 1.

9

AIN2

I

External Analog Input Channel 2.

10

GND

S

Ground.

11

GND

S

Ground.

12

GND

S

Ground.

13

GND

S

Ground.

14

S

Power Supply.

15

MSEL2

I

SPI, Mode Select 2. Used for data input functions.

16

MSEL1

I

SPI, Mode Select 1. Used for data output functions.