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IS25LE512MG-RHLA2:PTY Datasheet(PDF) 8 Page - Integrated Silicon Solution, Inc |
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IS25LE512MG-RHLA2:PTY Datasheet(HTML) 8 Page - Integrated Silicon Solution, Inc |
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8 / 194 page ![]() IS25LE512MG IS25WE512MG Integrated Silicon Solution, Inc.- www.issi.com 8 Rev. A6 10/02/2025 1. PIN CONFIGURATION Top View, Balls Facing Down NC NC NC NC F1 F2 F3 F4 NC RESET#/NC NC NC SCK GND VCC NC CE# NC WP#(IO2) NC SO(IO1) SI(IO0) HOLD# or RESET# (IO3) NC NC NC NC NC A2 A3 A3 A4 B1 B2 B3 B4 C1 C2 C3 C4 D1 D2 D3 D4 E1 E2 E3 E4 A1 (1) NC NC NC SCK GND VCC NC CE# NC WP#(IO2) NC SO(IO1) SI(IO0) HOLD# or RESET# (IO3) NC NC NC NC NC NC NC/WP# NC Top View, Balls Facing Down NC A2 A3 A4 B1 B2 B3 B4 C1 C2 C3 C4 D1 D2 D3 D4 E1 E2 E3 E4 A5 B5 C5 D5 E5 (1) RESET#/NC (2) (2) (2) Notes: 1. The pin can be configured as Hold# or Reset# by setting P7 bit of the Read Register. Pin default is Hold# (IO3). 2. C4= IO2, and C5 = dedicated WP#, and A4 = RESET# in option W. 16-pin SOIC 300mil (1) 6 3 CE# Vcc SCK SI (IO0 ) 7 8 5 4 1 2 GND WP# (IO2) SO (IO1) HOLD# or RESET# (IO3) 8-contact WSON 8x6mm 12 10 11 9 13 15 14 5 7 6 8 4 2 3 16 1 Vcc HOLD# or RESET# (IO3) SCK CE# WP# (IO2) GND NC NC NC NC NC SI (IO0) SO (IO1) NC NC RESET#/NC 24-ball TFBGA 6x8mm (4x6 ball array) (Package: G) 24-ball TFBGA 6x8mm (5x5 ball array) (Package: H) (1) |
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