ADF5611BCCZ datasheet(4/48 Pages) AD

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Data Sheet

ADF5611

SPECIFICATIONS

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Table 1. Specifications (Continued)

Parameter

Symbol

Min

Typ

Max

Unit

Test Conditions/Comments

14-Bit R Divider Range

RDIV

16,383

All integers included

Input Current

150

μA

PHASE DETECTOR

Input Frequency

fPFD

Fractional Mode3

100

MHz

Integer Mode

100

MHz

CHARGE PUMP

Output Current

ICP

0.2 to 3.2

Set by the CP_I bit fields, see Table 50

Charge Pump Gain Step Size

200

μA

LOGIC INPUTS (CSB, SCK, AND

SDIO)

Input High Voltage

VINH

1.2

Input Low Voltage

VINL

0.6

Input Current

IIH/IIL

±1

µA

Input Capacitance

CIN

LOGIC INPUT (CE)

Input High Voltage

VINH-3V

1.8

Input Low Voltage

VINL-3V

0.8

Input Current

IIH-3V/IIL-3V

±1

μA

Input Capacitance

CIN-3V

LOGIC OUTPUT (SDO AND SDIO)

Output High Voltage (1.8V Mode)

VOH

1.5

1.8

Output high current (IOH) = 500μA, 1.8V output

selected (default setting)

Output High Voltage (3.3V Mode)

VOH-3V

V3.3V −

0.4

IOH = 500μA, 3.3V output selected, Set by voltage on

DVDD pin

Output Low Voltage

VOL

0.4

Output low current (IOL) = 500μA

SDO High-Z Leakage

IZH/IZL

±1

μA

POWER SUPPLY VOLTAGES

3.3 V Supplies

3.15

3.3

3.45

AVDD, VCCHF, VCCPS, VCCPD, RVDD, DVDD,

VPPCP, VDDLS, VDD1, VDD2, and VDD3

5.0 V Supplies

4.75

5.0

5.25

VCOVCC

POWER DISSIPATION

Typical Power Dissipation

PDIS

fREF = fPFD = 100MHz, R_DIV = 1, ICP = 3.2mA,

RFOUT_PWR = 3, DIV_PWR = 3, RFOUT_DIV =

divide by 128

POWER SUPPLY CURRENTS

fREF = fPFD = 100MHz, R_DIV = 1, ICP = 3.2mA,

RFOUT_PWR = 3, DIV_PWR = 0

AVDD

μA

3.3V

RVDD

3.3V

VCCHF

μA

3.3V

VCCPS

3.3V

VCCPD

3.3V

DVDD

3.3V

VPPCP and VDDLS

3.3V, grouped supply current for VPPCP and VDDLS

VDD1

3.3V

VDD2

3.3V

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