TLV7021 datasheet(21/52 Pages) TI2

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OUT

REF

1.8 V

1.2 V

4.0 V

0.0 V

1.61 V

1.58 V

Time

0.0

200.0 u

400.0 u

600.0 u

800.0 u

TLV7011, TLV7021, TLV7012, TLV7022

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SLVSDM5F – SEPTEMBER 2017 – REVISED MARCH 2020

Product Folder Links: TLV7011 TLV7021 TLV7012 TLV7022

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Typical Applications (continued)

8.2.2.1 Design Requirements

For this design, follow these design requirements:

•

Use a proper resistor (R1) value to generate an adequate signal amplitude applied to the inverting input of the

comparator.

•

The low input bias current IB (2 pA typical) ensures that a greater value of R1 to be used.

•

The RC constant value (R2 and C1) must support the targeted data rate (that is, 9,600 bauds) to maintain a

valid tripping threshold.

•

The hysteresis introduced with R3 and R4 helps to avoid spurious output toggles.

8.2.2.2 Detailed Design Procedure

The IR receiver AFE design is highly streamlined and optimized. R1 converts the IR light energy induced current

into voltage and applies to the inverting input of the comparator. Because a reverse biased IR LED is used as

the IR receiver, a higher I/V transimpedance gain is required to boost the amplitude of reduced current. A 10M

resistor is used as R1 to support a 1-V, 100-nA transimpedance gain. This is made possible with the picoamps

Input bias current IB (5pA typical). The RC network of R2 and C1 establishes a reference voltage Vref which tracks

the mean amplitude of the IR signal. The RC constant of R2 and C1 (about 4.7 ms) is chosen for Vref to track the

received IR current fluctuation but not the actual data bit stream. The noninverting input is connected to Vref and

the output over the R3 and R4 resistor network which provides additional hysteresis for improved guard against

spurious toggles.

To reduce the current drain from the coin cell battery, data transmission must be short and infrequent.

8.2.2.3 Application Curve

Figure 38. IR Receiver AFE Waveforms

TLV7021 Datasheet(PDF) 21 Page - Texas Instruments

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