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IS25LE01G-RILA3-TY Datasheet(PDF) 88 Page - Integrated Silicon Solution, Inc

No. de pieza IS25LE01G-RILA3-TY
Descripción Electrónicos  SERIAL FLASH MEMORY 133/104MHZ MULTI I/O SPI & QUAD I/O QPI DTR INTERFACE WITH ON-CHIP ECC
PDF  186 Pages
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Fabricante Electrónico  ISSI [Integrated Silicon Solution, Inc]
Página de inicio  http://www.issi.com
Logo ISSI - Integrated Silicon Solution, Inc

IS25LE01G-RILA3-TY Datasheet(HTML) 88 Page - Integrated Silicon Solution, Inc

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IS25LE01G
IS25WE01G
Integrated Silicon Solution, Inc.- www.issi.com
88
Rev. A6
01/14/2025
Figure 8.26 Quad Input Page Program operation (32h/38h [EXTADD=1] or 34h/3Eh, 4-byte address)
31
4-byte Address
30
39
40
41
42
43
Instruction = 32h/38h/34h/3Eh
CE #
SCK
4
0
4
0
High Impedance
...
0
0
1
2
3
4
5
6
7
8
9
Mode 3
Mode 0
IO0
IO1
5
1
5
1
6
2
6
2
7
3
7
3
Data In 2
IO2
IO3
...
Data In 1
...
...
...
...
...
8.12 ERASE OPERATION
The Erase command sets all bits in th
e addressed sector or block to “1”s.
The memory array of the device is organized into uniform 4 Kbyte sectors or 32/64/256 Kbyte uniform blocks (a
block consists of eight/sixteen adjacent sectors respectively).
Before a byte is reprogrammed, the sector
or block that contains the byte must be erased (erasing sets bits to “1”).
In order to erase the device, there are three erase instructions available: Sector Erase (SER), Block Erase (BER),
and Chip Erase (CER). A sector erase operation allows any individual sector to be erased without affecting the
data in other sectors. A block erase operation erases any individual block. A chip erase operation erases the whole
memory array of a device. A sector erase, block erase, or chip erase operation can be executed prior to any
programming operation.



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