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D950-CORE Datasheet(PDF) 66 Page - STMicroelectronics |
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D950-CORE Datasheet(HTML) 66 Page - STMicroelectronics |
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66 / 89 page ![]() 66/89 D950-Core 7 ANNEX - HARDWARE PERIPHERAL LIBRARY Specifications for peripheral functions designed for integration with the D950-Core, are given in this chapter. An example of an AS-DSP built around the D950-Core and associated peripherals, is given at the beginning of this data sheet. Other peripherals are available. Contact your local marketing support for additional information. The peripherals detailed in this section are: • Co-processor • Bus Switch Unit (BSU) • Interrupt controller • DMA controller. 7.1 CO-PROCESSOR Dedicated co-processors can be designed by SGS-Thomson, by customer request. The D950-Core instruction set includes two co-processor dedicated one-word instructions, allowing one (COPS) or two (COPD) parallel data moves between X or Y-memory space and co-processor registers. While a co-processor instruction is decoded by the D950-Core, the VCI output is asserted high, indicating to the co-processor that such an instruction will be executed at the next cycle. Control and status registers, at least one of each, must be included in the co-processor. This allows initialization in various operating modes and gives information to the D950-Core on operations in progress and status. 8 |
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