GND

EN

IN

GND

OUT

COUT

BYPASS

CIN

Thermal

Vias

1

2

3

4

5

6

EN

IN

CIN

GND

OUT

COUT

BYPASS

C3

C1

B2

A3

A1

LP3995

www.ti.com

SNVS179F – FEBRUARY 2003 – REVISED SEPTEMBER 2015

10 Power Supply Recommendations

The LP3995 is designed to operate from an input voltage supply range from 2.5 V to 6 V.

11 Layout

11.1 Layout Guidelines

The dynamic performance of the LP3995 is dependant on the layout of the PCB. PCB layout practices that are

adequate for typical LDOs may degrade the PSRR, noise, or transient performance of the LP3995. Best

performance is achieved by placing CIN and COUT on the same side of the PCB as the LP3995, and as close as

is practical to the package. The ground connections for CIN and COUT should be back to the LP3995 ground pin

using as wide, and as short, of a copper trace as is practical. Connections using long trace lengths, narrow trace

widths, and/or connections through vias should be avoided. These add parasitic inductances and resistance that

result in inferior performance especially during transient conditions.

11.2 Layout Examples

Figure 22. LP3995 DSBGA Layout

Figure 23. LP3995 WSON Layout

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Product Folder Links: LP3995