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USB3300 Datasheet(PDF) 39 Page - SMSC Corporation

No. de pieza USB3300
Descripción Electrónicos  Hi-Speed USB Host, Device or OTG PHY with ULPI Low Pin Interface
PDF  55 Pages
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Fabricante Electrónico  SMSC [SMSC Corporation]
Página de inicio  http://www.smsc.com
Logo SMSC - SMSC Corporation

USB3300 Datasheet(HTML) 39 Page - SMSC Corporation

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Hi-Speed USB Host, Device or OTG PHY with ULPI Low Pin Interface
Datasheet
SMSC USB3300
39
Revision 1.08 (11-07-07)
DATASHEET
by the Link. The state of the resistors is determined by the operating mode of the PHY. The possible
valid resistor combinations are shown in Table 6.8, "DP/DM termination vs. Signaling Mode". Operation
is guaranteed in the configurations given in the table below.
RPU_DP_EN activates the 1.5kΩ DP pull-up resistor
RPU_DM_EN activates the 1.5kΩ DM pull-up resistor
RPD_DP_EN activates the 15kΩ DP pull-down resistor
RPD_DM_EN activates the 15kΩ DM pull-down resistor
HSTERM_EN activates the 45Ω DP and DM high speed termination resistors
Table 6.8 DP/DM termination vs. Signaling Mode
SIGNALING MODE
REGISTER SETTINGS
RESISTOR SETTINGS
General Settings
Tri-State Drivers
XXb
Xb
01b
Xb
Xb
0b0b0b0b0b
Power-up or Vbus < VSESSEND
01b
0b
00b1b
1b
0b0b1b1b0b
Host Settings
Host Chirp
00b
0b
10b1b
1b
0b0b1b1b1b
Host Hi-Speed
00b
0b
00b1b
1b
0b0b1b1b1b
Host Full Speed
X1b
1b
00b1b
1b
0b0b1b1b0b
Host HS/FS Suspend
01b
1b
00b1b
1b
0b0b1b1b0b
Host HS/FS Resume
01b
1b
10b1b
1b
0b0b1b1b0b
Host low Speed
10b
1b
00b1b
1b
0b0b1b1b0b
Host LS Suspend
10b
1b
00b
1b
1b
0b
0b
1b
1b
0b
Host LS Resume
10b
1b
10b1b
1b
0b0b1b1b0b
Host Test J/Test_K
00b
0b
10b1b
1b
0b0b1b1b1b
Peripheral Settings
Peripheral Chirp
00b
1b
10b
0b
0b
1b
0b
0b
0b
0b
Peripheral HS
00b
0b
00b
0b
0b
0b
0b
0b
0b
1b
Peripheral FS
01b
1b
00b
0b
0b
1b
0b
0b
0b
0b
Peripheral HS/FS Suspend
01b
1b
00b
0b
0b
1b
0b
0b
0b
0b
Peripheral HS/FS Resume
01b
1b
10b
0b
0b
1b
0b
0b
0b
0b
Peripheral LS
10b
1b
00b
0b
0b
0b
1b
0b
0b
0b
Peripheral LS Suspend
10b
1b
00b
0b
0b
0b
1b
0b
0b
0b



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