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PIC16F1507-E/SS. Datasheet(PDF) 160 Page - Microchip Technology

No. de pieza PIC16F1507-E/SS.
Descripción Electrónicos  20-Pin Flash, 8-Bit Microcontrollers
PDF  278 Pages
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Fabricante Electrónico  MICROCHIP [Microchip Technology]
Página de inicio  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

PIC16F1507-E/SS. Datasheet(HTML) 160 Page - Microchip Technology

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PIC16(L)F1507
DS40001586D-page 160
 2011-2015 Microchip Technology Inc.
20.6
Register Definitions: CLC Control
REGISTER 20-1:
CLCxCON: CONFIGURABLE LOGIC CELL CONTROL REGISTER
R/W-0/0
R/W-0/0
R-0/0
R/W-0/0
R/W-0/0
R/W-0/0
R/W-0/0
R/W-0/0
LCxEN
LCxOE
LCxOUT
LCxINTP
LCxINTN
LCxMODE<2:0>
bit 7
bit 0
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
u = Bit is unchanged
x = Bit is unknown
-n/n = Value at POR and BOR/Value at all other Resets
‘1’ = Bit is set
‘0’ = Bit is cleared
bit 7
LCxEN:
Configurable Logic Cell Enable bit
1
= Configurable logic cell is enabled and mixing input signals
0
= Configurable logic cell is disabled and has logic zero output
bit 6
LCxOE:
Configurable Logic Cell Output Enable bit
1
= Configurable logic cell port pin output enabled
0
= Configurable logic cell port pin output disabled
bit 5
LCxOUT:
Configurable Logic Cell Data Output bit
Read-only: logic cell output data, after LCxPOL; sampled from lcx_out wire.
bit 4
LCxINTP:
Configurable Logic Cell Positive Edge Going Interrupt Enable bit
1
= CLCxIF will be set when a rising edge occurs on lcx_out
0
= CLCxIF will not be set
bit 3
LCxINTN:
Configurable Logic Cell Negative Edge Going Interrupt Enable bit
1
= CLCxIF will be set when a falling edge occurs on lcx_out
0
= CLCxIF will not be set
bit 2-0
LCxMODE<2:0>:
Configurable Logic Cell Functional Mode bits
111
= Cell is 1-input transparent latch with S and R
110
= Cell is J-K flip-flop with R
101
= Cell is 2-input D flip-flop with R
100
= Cell is 1-input D flip-flop with S and R
011
= Cell is S-R latch
010
= Cell is 4-input AND
001
= Cell is OR-XOR
000
= Cell is AND-OR



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