PIC16F1507-ESLASHSS. datasheet(95/278 Pages) MICROCHIP

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DS40001586D-page 95

PIC16(L)F1507

11.0

I/O PORTS

Each port has three standard registers for its operation.

These registers are:

• TRISx registers (data direction)

• PORTx registers (reads the levels on the pins of

the device)

• LATx registers (output latch)

Some ports may have one or more of the following

additional registers. These registers are:

• ANSELx (analog select)

• WPUx (weak pull-up)

In general, when a peripheral is enabled on a port pin,

that pin cannot be used as a general purpose output.

However, the pin can still be read.

The Data Latch (LATx registers) is useful for

read-modify-write operations on the value that the I/O

pins are driving.

A write operation to the LATx register has the same

effect as a write to the corresponding PORTx register.

A read of the LATx register reads of the values held in

the I/O PORT latches, while a read of the PORTx

Ports that support analog inputs have an associated

ANSELx register. When an ANSEL bit is set, the digital

input buffer associated with that bit is disabled.

Disabling the input buffer prevents analog signal levels

on the pin between a logic high and low from causing

excessive current in the logic input circuitry. A

simplified model of a generic I/O port, without the

interfaces to other peripherals, is shown in Figure 11-1.

FIGURE 11-1:

GENERIC I/O PORT

OPERATION

TABLE 11-1:

PORT AVAILABILITY PER

DEVICE

Device

PIC16(L)F1507

●●●

Write LATx

Write PORTx

Data bus

Read PORTx

To digital peripherals

To analog peripherals

Data Register

TRISx

VSS

I/O pin

ANSELx

Read LATx

VDD

Rev. 10-000052A

7/30/2013

PIC16F1507-E/SS. Datasheet(PDF) 95 Page - Microchip Technology

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