PIC16F1507-ESLASHSS. datasheet(214/278 Pages) MICROCHIP

214 / 278 page

PIC16(L)F1507

DS40001586D-page 214

 2011-2015 Microchip Technology Inc.

TABLE 25-4:

I/O PORTS

Standard Operating Conditions (unless otherwise stated)

Param.

No.

Sym.

Characteristic

Min.

Typ†

Max.

Units

Conditions

VIL

Input Low Voltage

I/O PORT:

D030

with TTL buffer

—

0.8

4.5V

 VDD  5.5V

D030A

—

0.15 VDD

V1.8V

 VDD  4.5V

D032

MCLR

——

0.2 VDD

VIH

Input High Voltage

I/O PORT:

D040

with TTL buffer

2.0

—

4.5V

 VDD 5.5V

D040A

0.25 VDD +

0.8

——

1.8V

 VDD  4.5V

D042

MCLR

0.8 VDD

——

IIL

Input Leakage Current(1)

D060

I/O Ports

—

± 5

± 125

VSS

 VPIN  VDD,

Pin at high-impedance, 85°C

—

± 5

± 1000

VSS

 VPIN  VDD,

Pin at high-impedance, 125°C

D061

MCLR(2)

—± 50

± 200

VSS

 VPIN  VDD,

Pin at high-impedance, 85°C

IPUR

Weak Pull-up Current

D070*

100

200

AVDD = 3.3V, VPIN = VSS

140

300

AVDD = 5.0V, VPIN = VSS

VOL

Output Low Voltage

D080

I/O Ports

——

0.6

IOL = 8 mA, VDD = 5V

IOL = 6 mA, VDD = 3.3V

IOL = 1.8 mA, VDD = 1.8V

VOH

Output High Voltage

D090

I/O Ports

VDD - 0.7

—

IOH = 3.5 mA, VDD = 5V

IOH = 3 mA, VDD = 3.3V

IOH = 1 mA, VDD = 1.8V

Capacitive Loading Specifications on Output Pins

D101A* CIO

All I/O pins

—

These parameters are characterized but not tested.

†

Data in “Typ” column is at 3.0V, 25°C unless otherwise stated. These parameters are for design guidance only and are

not tested.

Note

Negative current is defined as current sourced by the pin.

The leakage current on the MCLR pin is strongly dependent on the applied voltage level. The specified levels represent

normal operating conditions. Higher leakage current may be measured at different input voltages.

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