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AMC80AIPWR Datasheet(PDF) 4 Page - Texas Instruments |
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AMC80AIPWR Datasheet(HTML) 4 Page - Texas Instruments |
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4 / 31 page  AMC80 SBOS559B – MAY 2011 – REVISED OCTOBER 2015 www.ti.com Pin Functions PIN NO. NAME I/O TYPE DESCRIPTION Interrupt input pin. An active low input that extends the INT_IN signal to the INT output 1 INT_IN Input Digital of the AMC80. 2 SDA I/O Digital Serial bus data line for SMBus, open-drain; requires pull-up resistor. 3 SCL I/O Digital Serial bus clock line for SMBus, open-drain; requires pull-up resistor. 4 FAN1 Input Digital Fan tachometer input pin 5 FAN2 Input Digital Fan tachometer input pin Board temperature interrupt pin. BTI is driven by the over-temperature shutdown (OS) 6 BTI Input Digital outputs of the additional temperature sensors. This pin has an internal 10-k Ω pull-up resistor. General-purpose input pin (chassis interrupt). An active high interrupt input pin to latch 7 GPI(CI) Input Digital a chassis interrupt event. 8 DGND Power Analog Digital ground. 9 V+ Power Analog Positive supply voltage (3V to 5.5V). Non-maskable interrupt (active high, PMOS, push-pull) or interrupt request (active low, 10 INT Output Digital NMOS, push-pull) pin. The INT pin becomes active when INT_IN, BTI, or GPI interrupts. This pin does not require a pullup resistor to V+. General-purpose output pin. GPO is an active low, NMOS, open-drain output. This pin 11 GPO Output Digital is intended to drive an external power PMOS for software power control or to control power to a cooling fan. This pin is an active-low input that enables NAND tree board-level connectivity testing. 12 NTEST_IN/RESET_IN Input Digital The AMC80 resets to its power-on state when NAND tree connectivity is enabled. This pin is an NMOS open-drain output. RST_OUT provides a master reset to devices 13 RST_OUT/OS Output Digital connected to this line. OS is dedicated to the temperature reading alarm. Analog ground. This pin must be tied to a low-noise analog ground plane for optimum 14 AGND Power Analog performance. 15 CH6 Input Analog Analog input channel 6 16 CH5 Input Analog Analog input channel 5 17 CH4 Input Analog Analog input channel 4 18 CH3 Input Analog Analog input channel 3 19 CH2 Input Analog Analog input channel 2 20 CH1 Input Analog Analog input channel 1 21 CH0 Input Analog Analog input channel 0 The lowest order bit of the serial bus address. During a NAND tree test for ATE board- 22 A0/NTEST_OUT I/O Digital level connectivity, this pin functions as an output. 23 A1 Input Digital Address pin 1 24 A2 Input Digital Address pin 2 4 Submit Documentation Feedback Copyright © 2011–2015, Texas Instruments Incorporated Product Folder Links: AMC80 |
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