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ISL72028ASEHEVAL1Z Datasheet(PDF) 12 Page - Renesas Technology Corp |
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ISL72028ASEHEVAL1Z Datasheet(HTML) 12 Page - Renesas Technology Corp |
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12 / 25 page ![]() FN8863 Rev.1.00 Page 12 of 25 Jul 27, 2017 ISL72028ASEH 2. Specifications Figure 18. Total Loop Delay Test Circuit Figure 19. Total Loop Delay Measurement Points Figure 20. Low Power Shutdown to Dominant Time Circuit Figure 21. Low Power Shutdown to Dominant Time Measurement Points Table 3. Differential Input Voltage Threshold Test Input Output Measured VCANH VCANL RVDIFF -6.1V -7V L 900mV 12V 11.1V L 900mV -1V -7V L 6V 12V 6V L 6V -6.5V -7V H 500mV 12V 11.5V H 500mV -7V -1V H 6V 6V 12V H 6V Open Open H X 0Ω, 10kΩ, 50kΩ 60Ω CAN H CAN L GND RS VREF D R VO VIN 15pF ±20% VIN = 125kHz, duty cycle 50%, tr = tf ≤ 6ns ±1% FLOAT t(LOOP2) 50% 50% 50% 50% t(LOOP1) VIN VO VCC 0V VOH VOL D VREF RS R CAN_L CAN_H GND VOD 60Ω VIN 15pF ±20% FLOAT ±1% VO VIN = 125kHz, 0V to VCC, duty cycle 50%, tr = tf ≤ 6ns 50% VIN VO VCC 0V VOH VOL t (LPS - DOM) 50% |
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