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TC9256AFG Datasheet(PDF) 9 Page - Toshiba Semiconductor

No. de pieza TC9256AFG
Descripción Electrónicos  PLL for DTS
PDF  34 Pages
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Fabricante Electrónico  TOSHIBA [Toshiba Semiconductor]
Página de inicio  http://www.semicon.toshiba.co.jp/eng
Logo TOSHIBA - Toshiba Semiconductor

TC9256AFG Datasheet(HTML) 9 Page - Toshiba Semiconductor

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TC9256, 57APG/AFG
2006-07-14
9
Reference Counter (Reference Frequency Divider)
The reference counter section consists of a crystal oscillator and a counter.
A crystal oscillator frequency of 3.6 MHz, 4.5 MHz, 7.2 MHz or 10.8 MHz can be selected. A maximum of 15
reference frequencies can be generated.
1.
Setting Reference Frequency
The reference frequency is set using bits R0 to R3.
Note 1: Reference frequencies marked with an asterisk “*” can only be generated with a 4.5 MHz crystal
oscillator.
Note 2: (*1) Standby mode
Standby mode occurs when bits R0, R1, R2 and R3 are all set to “1”. In standby mode, the
programmable counter stops, and FM, AM and IFIN (when IFIN is selected) are set to “amp off” state
(pins at “L” level). This saves current consumption when the radio is turned off. The DO pins become
high impedance during standby mode.
During standby mode, the I/O ports (I/O-5 to I/O-9) and output ports (OT1 to OT4) can be controlled and
the crystal oscillator can be turned on and off.
Note 3: The system is set to standby mode when power is turned on. At this time, the crystal oscillator is not
oscillating and the I/O ports are set to input mode.



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