Motor de Búsqueda de Datasheet de Componentes Electrónicos
  Spanish  ▼
ALLDATASHEET.ES

X  

Preview PDF HTML

AX88172ATF Datasheet(PDF) 28 Page - ASIX Electronics Corporation

No. de pieza AX88172ATF
Descripción Electrónicos  USB 2.0 to 10/100M Fast Ethernet Controller
PDF  45 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Fabricante Electrónico  ASIX [ASIX Electronics Corporation]
Página de inicio  http://www.asix.com.tw
Logo ASIX - ASIX Electronics Corporation

AX88172ATF Datasheet(HTML) 28 Page - ASIX Electronics Corporation

Back Button AX88172ATF Datasheet HTML 24Page - ASIX Electronics Corporation AX88172ATF Datasheet HTML 25Page - ASIX Electronics Corporation AX88172ATF Datasheet HTML 26Page - ASIX Electronics Corporation AX88172ATF Datasheet HTML 27Page - ASIX Electronics Corporation AX88172ATF Datasheet HTML 28Page - ASIX Electronics Corporation AX88172ATF Datasheet HTML 29Page - ASIX Electronics Corporation AX88172ATF Datasheet HTML 30Page - ASIX Electronics Corporation AX88172ATF Datasheet HTML 31Page - ASIX Electronics Corporation AX88172ATF Datasheet HTML 32Page - ASIX Electronics Corporation Next Button
Zoom Inzoom in Zoom Outzoom out
 28 / 45 page
background image
ASIX ELECTRONICS CORPORATION
28
AX88772A/AX88172A
Low-pin-count
USB 2.0 to 10/100M Fast Ethernet Controller
9.4 AC Timing Characteristics
Notice that the following AC timing specifications for output pins are based on CL (Output
load)=50pF.
9.4.1
Clock Timing
XTL12P
TP_XTL12P
TH_XTL12P
TL_XTL12P
Symbol
Parameter
Condition
Min
Typ
Max
Unit
TP_XTL12P XTL12P clock cycle time
-
83.33
-
ns
TH_XTL12P XTL12P clock high time
-
41.6
-
ns
TL_XTL12P XTL12P clock low time
-
41.6
-
ns
XTL25P
TP_XTL25P
TH_XTL25P
TL_XTL25P
Symbol
Parameter
Condition
Min
Typ
Max
Unit
TP_XTL25P XTL25P clock cycle time
-
40.0
-
ns
TH_XTL25P XTL25P clock high time
-
20.0
-
ns
TL_XTL25P XTL25P clock low time
-
20.0
-
ns
9.4.2
Reset Timing
XTL12P
RESET_N
Symbol
Description
Min
Typ
Max
Unit
Trst
Reset pulse width after XTL12P is running
60
-
120000 XTL12P clock cycle*
*: If the system applications require using hardware reset pin, RESET_N, to reset AX88772A/AX88172A during device
initialization or normal operation after VBUS pin is asserted, the above timing spec (Min=5μs, Max=10ms) of
RESET_N should be met.
VIH
VIL
VIH
VIL
Trst



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45


Datasheet Descarga

Go To PDF Page


Enlace URL



¿ALLDATASHEET es útil para Ud.?  [ DONATE ] 

Todo acerca de Alldatasheet   |   Publicidad   |   Contáctenos   |   Política de Privacidad   |   Enlace a la hoja de datos    |   Intercambio de Enlaces   |   Lista de Fabricantes
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com