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TC74HC02AP Datasheet(PDF) 1 Page - Toshiba Semiconductor |
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TC74HC02AP Datasheet(HTML) 1 Page - Toshiba Semiconductor |
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1 / 8 page ![]() TC74HC02AP/AF/AFN 2007-10-01 1 TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC74HC02AP,TC74HC02AF,TC74HC02AFN Quad 2-Input NOR Gate The TC74HC02A is a high speed CMOS 2-INPUT NOR GATE fabricated with silicon gate C2MOS technology. It achieves the high speed operation similar to equivalent LSTTL while maintaining the CMOS low power dissipation. The internal circuit is composed of 3 stages, including a buffer output, which provide high noise immunity and stable output. All inputs are equipped with protection circuits against static discharge or transient excess voltage. Features • High speed: tpd = 6 ns (typ.) at VCC = 5 V • Low power dissipation: ICC = 1 μA (max) at Ta = 25°C • High noise immunity: VNIH = VNIL = 28% VCC (min) • Output drive capability: 10 LSTTL loads • Symmetrical output impedance: |IOH| = IOL = 4 mA (min) • Balanced propagation delays: tpLH ∼− tpHL • Wide operating voltage range: VCC (opr) = 2~6 V • Pin and function compatible with 74LS02 Pin Assignment IEC Logic Symbol Note: xxxFN (JEDEC SOP) is not available in Japan. TC74HC02AP TC74HC02AF TC74HC02AFN Weight DIP14-P-300-2.54 : 0.96 g (typ.) SOP14-P-300-1.27A : 0.18 g (typ.) SOL14-P-150-1.27 : 0.12 g (typ.) |
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