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DFPCOMP Datasheet(PDF) 2 Page - Digital Core Design |
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DFPCOMP Datasheet(HTML) 2 Page - Digital Core Design |
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2 / 3 page ![]() All trademarks mentioned in this document are trademarks of their respective owners. Copyright 1999-2007 DCD – Digital Core Design. All Rights Reserved. http://www.DigitalCoreDesign.com http://www.dcd.pl Unlimited Designs license allows using IP Core in unlimited number of FPGA bitstreams and ASIC implementations. In all cases number of IP Core instantiations within a design, and number of manufactured chips are unlimited. There is no time of use limitations. ● ○ Single Design license for VHDL, Verilog source code called HDL Source Encrypted, or plain text EDIF called Netlist ○ ● ○ ○ ● ○ ○ Unlimited Designs license for HDL Source Netlist Upgrade from Netlist to HDL Source Single Design to Unlimited Designs SYMBOL adatai(31:0) bdatai(31:0) en rst clk gto eqo lto ifo PINS DESCRIPTI O N PIN TYPE DESCRIPTION clk Input Global system clock rst Input Global system reset en Input Enable computing adatai[31:0] Input A data bus input bdatai[31:0] Input B data bus input gto output A>B output eqo output A=B output lto output A<B output ifo output Invalid result flag BLOCK DIAGRAM adatai(31:0) en rst clk gto eqo lto ifo Arguments Checker Main FP Pipelined Unit bdatai(31:0) Arguments Checker - performs input data analyze against IEEE-754 number standard compliance. The appropriate numbers and information about the input data classes are given as the results to Main FP Pipelined Unit. Main FP Pipelined Unit - performs floating point compare function. Gives the complex information about the results and makes final flags settings. PERFORMANCE The following table gives a survey about the Core area and performance in the ALTERA® devices after Place & Route : Device Speed grade Logic Cells Fmax FLEX10KE -1 83 81 MHz ACEX1K -1 83 82 MHz APEX20K -1 79 60 MHz APEX20KE -1 79 76 MHz APEX20KC -7 79 98 MHz APEX-II -7 79 118 MHz MERCURY -5 85 178 MHz STRATIX -5 82 152 MHz CYCLONE -6 81 140 MHz STRATIX-II -3 66 225 MHz CYCLONE -II -6 81 141 MHz Core performance in ALTERA® devices |
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