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TMP93CS41 Datasheet(PDF) 187 Page - Toshiba Semiconductor |
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TMP93CS41 Datasheet(HTML) 187 Page - Toshiba Semiconductor |
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187 / 248 page ![]() TMP93CS40/TMP93CS41 2004-02-10 93CS40-185 Handshake function Serial channel 0 has a CTS0 pin. Using this pin, data can be sent in units of one frame; thus, overrun errors can be avoided. The handshake function is enabled/disabled by SC0MOD<CTSE>. When the CTS0 pin goes high, after completion of the current data transmission, data transmission is halted until the CTS0 pin goes low again. When the INTTX0 interrupt is generated, it requests the next data transmission to the CPU. Although there is no RTS pin, a handshake function can easily be configured by assigning any port to the RTS function. The RTS output should be high to request a halt to data transmission after data receive is completed by software in the RXD interrupt routine. Figure 3.11.16 Handshake Function Note 1: If the CTS signal rises during transmission, the next datum is not sent after completion of the current transmission. Note 2: Transmission starts at the first falling edge of the TXDCLK clock after the CTS signal falls. Figure 3.11.17 Timing of CTS (Clear to send) RXD RTS (Any port) TXD CTS TMP93CS40/S41 TMP93CS40/S41 Sender Receiver Send is suspended from (A) to (B). Timing to write to transmission buffer Bit0 Start bit 13 14 15 16 1 2 3 14 15 16 1 2 3 SIOCLK TXDCLK TXD CTS (A). (B) |
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