LTC1864 datasheet(7/20 Pages) LINER

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LTC1864/LTC1865

sn18645 18645fs

VREF (Pin 1): Reference Input. The reference input defines

the span of the A/D converter and must be kept free of

noise with respect to GND.

IN+, IN– (Pins 2, 3): Analog Inputs. These inputs must be

free of noise with respect to GND.

GND (Pin 4): Analog Ground. GND should be tied directly

to an analog ground plane.

CONV (Pin 5): Convert Input. A logic high on this input

starts the A/D conversion process. If the CONV input is left

high after the A/D conversion is finished, the part powers

down. A logic low on this input enables the SDO pin,

allowing the data to be shifted out.

SDO (Pin 6): Digital Data Output. The A/D conversion

result is shifted out of this pin.

SCK (Pin 7): Shift Clock Input. This clock synchronizes the

serial data transfer.

VCC (Pin 8): Positive Supply. This supply must be kept

free of noise and ripple by bypassing directly to the

analog ground plane.

PI FU CTIO S

LTC1865 (MSOP Package)

CONV (Pin 1): Convert Input. A logic high on this input

starts the A/D conversion process. If the CONV input is left

high after the A/D conversion is finished, the part powers

down. A logic low on this input enables the SDO pin,

allowing the data to be shifted out.

CH0, CH1 (Pins 2, 3): Analog Inputs. These inputs must

be free of noise with respect to AGND.

AGND (Pin 4): Analog Ground. AGND should be tied

directly to an analog ground plane.

DGND (Pin 5): Digital Ground. DGND should be tied

directly to an analog ground plane.

SDI (Pin 6): Digital Data Input. The A/D configuration

word is shifted into this input.

CONV (Pin 1): Convert Input. A logic high on this input

starts the A/D conversion process. If the CONV input is left

high after the A/D conversion is finished, the part powers

down. A logic low on this input enables the SDO pin,

allowing the data to be shifted out.

CH0, CH1 (Pins 2, 3): Analog Inputs. These inputs must

be free of noise with respect to GND.

GND (Pin 4): Analog Ground. GND should be tied directly

to an analog ground plane.

LTC1865 (SO-8 Package)

SDO (Pin 7): Digital Data Output. The A/D conversion

result is shifted out of this output.

SCK (Pin 8): Shift Clock Input. This clock synchronizes the

serial data transfer.

VCC (Pin 9): Positive Supply. This supply must be kept

free of noise and ripple by bypassing directly to the

analog ground plane.

VREF (Pin 10): Reference Input. The reference input de-

fines the span of the A/D converter and must be kept free

of noise with respect to AGND.

SDI (Pin 5): Digital Data Input. The A/D configuration

word is shifted into this input.

SDO (Pin 6): Digital Data Output. The A/D conversion

result is shifted out of this output.

SCK (Pin 7): Shift Clock Input. This clock synchronizes the

serial data transfer.

VCC (Pin 8): Positive Supply. This supply must be kept

free of noise and ripple by bypassing directly to the

analog ground plane. VREF is tied internally to this pin.

LTC1864

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