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54HC74 Datasheet(PDF) 1 Page - Silicon Supplies |
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54HC74 Datasheet(HTML) 1 Page - Silicon Supplies |
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1 / 6 page ![]() High Speed CMOS Logic – 54HC74 Dual D-Type Flip-Flop Logic IC with Set and Reset in bare die form Rev 1.0 21/11/17 Die Size (Unsawn) 1194 x 1397 47 x 55 µm mils Minimum Bond Pad Size 100 x 100 3.94 x 3.94 µm mils Die Thickness 350 (±20) 13.78 (±0.79) µm mils Top Metal Composition Al 1%Si 1.1µm Back Metal Composition N/A – Bare Si Output Drive Capability: 10 LSTTL Loads Outputs Directly Interface to CMOS, NMOS, and TTL Low Input Current: 1µA Asynchronous Set-Reset Capability ±4mA Output Drive at 5V Operating Voltage Range: 2.0 to 6.0 V Direct drop-in replacement for obsolete components in long term programs. Features: The following part suffixes apply: Description The 54HC74 is fabricated using a 2.5µm 5V CMOS process and consists of two identical, independent data type flip-flops. Each flip-flop has separate data, set, reset, clock inputs and Q,Q outputs. The device can be used in Shift Register applications and also Counter or Toggle applications by connecting Q output to the data input. The logic level present at the “D” input is transferred to the Q output during the positive- going transition of the clock pulse. Setting or resetting is clock independent and accomplished by a high level on the respective Set or Reset line. Ordering Information Die Dimensions in µm (mils) 1194 (47) No suffix - MIL-STD-883 /2010B Visual Inspection “H” - MIL-STD-883 /2010B Visual Inspection + MIL-PRF-38534 Class H LAT “K” - MIL-STD-883 /2010A Visual Inspection (Space) + MIL-PRF-38534 Class K LAT LAT = Lot Acceptance Test. For further information on LAT process flows see below. www.siliconsupplies.com\quality\bare-die-lot-qualification Supply Formats: Mechanical Specification Default – Die in Waffle Pack (400 per tray capacity) Sawn Wafer on Tape – On request Unsawn Wafer – On request Die Thickness <> 350µm(14 Mils) – On request Assembled into Ceramic Package – On request Page 1 of 6 www.siliconsupplies.com |
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