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ST7263BHX Datasheet(PDF) 44 Page - STMicroelectronics

No. de pieza ST7263BHX
Descripción Electrónicos  Low speed USB 8-bit MCU family with up to 32K Flash/ROM, DFU capability, 8-bit ADC, WDG, timer, SCI & I짼C
PDF  145 Pages
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Fabricante Electrónico  STMICROELECTRONICS [STMicroelectronics]
Página de inicio  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

ST7263BHX Datasheet(HTML) 44 Page - STMicroelectronics

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Watchdog timer (Cont’d)
12.1.8 Register description
Control Register (CR)
Read/Write
Reset value: 0111 1111 (7Fh)
Bit 7 = WDGA Activation bit.
This bit is set by software and only cleared by
hardware after a reset. When WDGA = 1, the
watchdog can generate a reset.
0: Watchdog disabled
1: Watchdog enabled
Bit 6:0 = T[6:0] 7-bit timer (MSB to LSB).
These bits contain the decremented value. A reset
is produced when it rolls over from 40h to 3Fh (T6
becomes cleared).
Table 17. Watchdog timer register map and reset values
70
WDGA
T6
T5
T4
T3
T2
T1
T0
Address
(Hex.)
Register
Label
7
6
543
2
1
0
0Ch
WDGCR
Reset value
WDGA
0
T6
1
T5
1
T4
1
T3
1
T2
1
T1
1
T0
1



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