TLE2061ACD datasheet(57/78 Pages) TI

57 / 78 page

TLE206x, TLE206xA, TLE206xB

EXCALIBUR JFET INPUT HIGHOUTPUT DRIVE

µPOWER OPERATIONAL AMPLIFIERS

SLOS193B − FEBRUARY 1997 − REVISED MAY 2004

POST OFFICE BOX 655303

• DALLAS, TEXAS 75265

APPLICATION INFORMATION

input characteristics

The TLE206x, TLE206xA, and TLE206xB are specified with a minimum and a maximum input voltage that if

exceeded at either input could cause the device to malfunction. Because of the extremely high input impedance

and resulting low bias current requirements, the TLE206x, TLE206xA, and TLE206xB are well suited for

low-level signal processing. However, leakage currents on printed-circuit boards and sockets can easily exceed

bias current requirements and cause degradation in system performance. It is good practice to include guard

rings around inputs (see Figure 44). These guards should be driven from a low-impedance source at the same

voltage level as the common-mode input.

−

+ R2

Where

Figure 44. Use of Guard Rings

TLE2061 input offset voltage nulling

The TLE2061 series offers external null pins that can be used to further reduce the input offset voltage. The

circuit of Figure 45 can be connected as shown if the feature is desired. When external nulling is not needed,

the null pins may be left unconnected.

−

VCC −

100 k

Ω

5 k

Ω

IN −

IN +

OUT

Figure 45. Input Offset Voltage Nulling

TLE2061ACD Datasheet(PDF) 57 Page - Texas Instruments