Motor de Búsqueda de Datasheet de Componentes Electrónicos
  Spanish  ▼
ALLDATASHEET.ES

X  

Preview PDF HTML

TEST Datasheet(PDF) 7 Page - List of Unclassifed Manufacturers

No. de pieza TEST
Descripción Electrónicos  Low-voltage translating, 8-bit I2C-bus/SMBus I/O expander with interrupt output, reset, and configuration registers
PDF  49 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Fabricante Electrónico  ETC [List of Unclassifed Manufacturers]
Página de inicio  
Logo ETC - List of Unclassifed Manufacturers

TEST Datasheet(HTML) 7 Page - List of Unclassifed Manufacturers

Back Button TEST Datasheet HTML 3Page - List of Unclassifed Manufacturers TEST Datasheet HTML 4Page - List of Unclassifed Manufacturers TEST Datasheet HTML 5Page - List of Unclassifed Manufacturers TEST Datasheet HTML 6Page - List of Unclassifed Manufacturers TEST Datasheet HTML 7Page - List of Unclassifed Manufacturers TEST Datasheet HTML 8Page - List of Unclassifed Manufacturers TEST Datasheet HTML 9Page - List of Unclassifed Manufacturers TEST Datasheet HTML 10Page - List of Unclassifed Manufacturers TEST Datasheet HTML 11Page - List of Unclassifed Manufacturers Next Button
Zoom Inzoom in Zoom Outzoom out
 7 / 49 page
background image
PCAL6408A
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 3 — 18 September 2013
7 of 49
NXP Semiconductors
PCAL6408A
Low-voltage translating, 8-bit I2C-bus/SMBus I/O expander
6.
Voltage translation
Table 4 shows how to set up VDD levels for the necessary voltage translation between the
I2C-bus and the PCAL6408A.
7.
Functional description
Refer to Figure 1 “Block diagram (positive logic)”.
7.1 Device address
The address of the PCAL6408A is shown in Figure 7.
ADDR is the hardware address package pin and is held to either HIGH (logic 1) or LOW
(logic 0) to assign one of the two possible slave addresses. The last bit of the slave
address defines the operation (read or write) to be performed. A HIGH (logic 1) selects a
read operation, while a LOW (logic 0) selects a write operation.
Table 4.
Voltage translation
VDD(I2C-bus) (SDA and SCL of I2C master)
VDD(P) (Port P)
1.8V
1.8V
1.8V
2.5V
1.8V
3.3V
1.8V
5V
2.5V
1.8V
2.5V
2.5V
2.5V
3.3V
2.5V
5V
3.3V
1.8V
3.3V
2.5V
3.3V
3.3V
3.3V
5V
5V
1.8V
5V
2.5V
5V
3.3V
5V
5V
Fig 7.
PCAL6408A address
R/W
002aaf539
0
1
0
0
0
0
AD
DR
fixed
slave address
programmable



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49


Datasheet Descarga

Go To PDF Page


Enlace URL



¿ALLDATASHEET es útil para Ud.?  [ DONATE ] 

Todo acerca de Alldatasheet   |   Publicidad   |   Contáctenos   |   Política de Privacidad   |   Enlace a la hoja de datos    |   Intercambio de Enlaces   |   Lista de Fabricantes
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com