SC4503 datasheet(8/22 Pages) SEMTECH

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POWER MANAGEMENT

SC4503

Applications Information

Operation

The SC4503 is a 1.3MHz peak current-mode step-up

switching regulator with an integrated 1.4A (minimum)

power transistor. Referring to the block diagram, Figure

2, the clock CLK resets the latch and blanks the power

transistor Q

3 conduction. Q3 is switched on at the trailing

edge of the clock.

Switch current is sensed with an integrated sense resistor.

The sensed current is summed with the slope-compensat-

ing ramp and fed into the modulating ramp input of the

PWM comparator. The latch is set and Q

3 conduction is

terminated when the modulating ramp intersects the error

ampliﬁer (EA) output. If the switch current exceeds 1.9A (the

typical current-limit), then the current-limit comparator ILIM

will set the latch and turn off Q

3. Due to separate pulse-

width modulating and current limiting paths, cycle-by-cycle

current limiting is not affected by slope compensation.

The current-mode switching regulator is a dual-loop feed-

back control system. In the inner current loop the EA output

controls the peak inductor current. In the outer loop, the

error ampliﬁer regulates the output voltage. The double

reactive poles of the output LC ﬁlter are reduced to a single

real pole by the inner current loop, allowing the internal loop

compensation network to accommodate a wide range of

input and output voltages.

Applying 0.9V at the

SHDN

pin enables the voltage refer-

ence. The signal “REF NOT READY” does not go low until

IN exceeds its under-voltage lockout threshold (typically

2.2V). Assume that an external resistor is placed between

the IN and the

SHDN

pins during startup. The voltage

reference is enabled when the

SHDN

voltage rises to

0.9V. Before V

IN reaches 2.2V, “REF NOT READY” is high.

2 turns on and the Zener diode Z1 loosely regulates the

SHDN

voltage to 1V (above the reference enabling volt-

age). The optional external resistor limits the current drawn

during under-voltage lockout.

When V

IN exceeds 2.2V, “REF NOT READY” goes low. Q2 turns

off, releasing

SHDN

. If an external capacitor is connected

from the

SHDN

pin to the ground, the

SHDN

voltage

will ramp up slowly. The error ampliﬁer output, which is

clamped by D1 and Q1, follows the voltage at the

SHDN

pin. The input inductor current, which is in turn controlled

by the error ampliﬁer output, also ramps up gradually.

Soft-starting the SC4503 in this manner eliminates high

input current and output overshoot. Under fault condition

IN < 2.2V or over-temperature), the soft-start capacitor is

discharged to 1V. When the fault condition disappears, the

converter again undergoes soft-start.

Setting the Output Voltage

An external resistive divider R

1 and R2 with its center tap

tied to the FB pin (Figure 3) sets the output voltage.

−

(1)

Figure 3. R

1- R2 Divider Sets the Output Voltage

The input bias current of the error ampliﬁer will introduce

an error of:

(

)•

•

−

∆

(2)

The percentage error of a V

OUT = 5V converter with R1 =

100k

Ω and R

2 = 301kΩ is

(

)

−

•

−

∆

This error is much less than the ratio tolerance resulting

from the use of 1% resistors in the divider string.

VOUT

25nA

SC4503

VOUT

25nA

SC4503

VOUT

25nA

SC4503

VOUT

25nA

SC4503

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