PACE 1757 M/ME

Page 17 of 34

Document # MICRO-10 REV B

MMU Cache Miss Cycle (WA = 0)

MMU Cache Miss Cycle (WA > 0)

* The WR PROT/PROT FLAG signal is programmed as WR PROT or PROT GLAG. (See BPU Description). T = 1 Clock Period.

Note: All time measurements on active signals relate to 1.5V levels.