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TSA1204 Datasheet(PDF) 19 Page - STMicroelectronics |
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TSA1204 Datasheet(HTML) 19 Page - STMicroelectronics |
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19 / 31 page ![]() TSA1204 Application information 19/31 8.6 Layout precautions To use the ADC circuits most efficiently at high frequencies, some precautions have to be taken for power supplies: ● First of all, the implementation of 4 proper separate supplies and ground planes (analog, digital, internal and external buffer ones) on the PCB is recommended for high speed circuit applications to provide low inductance and low resistance common return. The separation of the analog signal from the digital output part is mandatory to prevent noise from coupling onto the input signal. The best compromise is to connect AGND, DGND, GNDBI in a common point whereas GNDBE must be isolated. Similarly, the AVCC, DVCC and VCCBI power supplies must be separate from the VCCBE power supply. ● Power supply bypass capacitors must be placed as close as possible to the IC pins in order to improve high frequency bypassing and reduce harmonic distortion. ● All inputs and outputs must be properly terminated with output termination resistors; then the amplifier load is resistive only and the stability of the amplifier is improved. All leads must be wide and as short as possible especially for the analog input in order to decrease parasitic capacitance and inductance. ● To keep the capacitive loading as low as possible at digital outputs, short lead lengths of routing are essential to minimize currents when the output changes. To minimize this output capacitance, use buffers or latches close to the output pins. ● Choose component sizes as small as possible (SMD). 8.7 EVAL1204/BA evaluation board The EVAL1204/BA is a 4-layer board with high decoupling and grounding level. The schematic of the evaluation board is shown in Figure 30 and its top overlay view in Figure 29. The board has been characterized with a fully devoted ADC test bench as shown in Figure 28. Figure 28. Analog-to-digital converter characterization bench Table 12. Total power consumption optimization depending on Rpol value FS (Msps) 10 20 Rpol (kΩ) 120 54 Optimized power (mW) 95 120 Sine Wave Generator HP8644 ADC evaluation board Pulse Generator Logic Analyzer Sine Wave Generator HP8644 HP8133 Vin Clk Data Clk PC |
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