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Motor de Búsqueda de Datasheet de Componentes Electrónicos |
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24FC128-E/SM Datasheet(PDF) 3 Page - Microchip Technology |
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24FC128-E/SM Datasheet(HTML) 3 Page - Microchip Technology |
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3 / 26 page  © 2007 Microchip Technology Inc. DS21191P-page 3 24AA128/24LC128/24FC128 TABLE 1-2: AC CHARACTERISTICS AC CHARACTERISTICS Electrical Characteristics: Industrial (I): VCC = +1.7V to 5.5V TA = -40°C to +85°C Automotive (E): VCC = +2.5V to 5.5V TA = -40°C to 125°C Param. No. Sym. Characteristic Min. Max. Units Conditions 1FCLK Clock frequency — — — — 100 400 400 1000 kHz 1.7V ≤ VCC < 2.5V 2.5V ≤ VCC ≤ 5.5V 1.7V ≤ VCC < 2.5V 24FC128 2.5V ≤ VCC ≤ 5.5V 24FC128 2THIGH Clock high time 4000 600 600 500 — — — — ns 1.7V ≤ VCC < 2.5V 2.5V ≤ VCC ≤ 5.5V 1.7V ≤ VCC < 2.5V 24FC128 2.5V ≤ VCC ≤ 5.5V 24FC128 3TLOW Clock low time 4700 1300 1300 500 — — — — ns 1.7V ≤ VCC < 2.5V 2.5V ≤ VCC ≤ 5.5V 1.7V ≤ VCC < 2.5V 24FC128 2.5V ≤ VCC ≤ 5.5V 24FC128 4TR SDA and SCL rise time (Note 1) — — — 1000 300 300 ns 1.7V ≤ VCC < 2.5V 2.5V ≤ VCC ≤ 5.5V 1.7V ≤ VCC ≤ 5.5V 24FC128 5TF SDA and SCL fall time (Note 1) — — 300 100 ns All except, 24FC128 1.7V ≤ VCC ≤ 5.5V 24FC128 6THD:STA Start condition hold time 4000 600 600 250 — — — — ns 1.7V ≤ VCC < 2.5V 2.5V ≤ VCC ≤ 5.5V 1.7V ≤ VCC < 2.5V 24FC128 2.5V ≤ VCC ≤ 5.5V 24FC128 7TSU:STA Start condition setup time 4700 600 600 250 — — — — ns 1.7V ≤ VCC < 2.5V 2.5V ≤ VCC ≤ 5.5V 1.7V ≤ VCC < 2.5V 24FC128 2.5V ≤ VCC ≤ 5.5V 24FC128 8THD:DAT Data input hold time 0 — ns (Note 2) 9TSU:DAT Data input setup time 250 100 100 — — — ns 1.7V ≤ VCC < 2.5V 2.5V ≤ VCC ≤ 5.5V 1.7V ≤ VCC ≤ 5.5V 24FC128 10 TSU:STO Stop condition setup time 4000 600 600 250 — — — — ns 1.7 V ≤ VCC < 2.5V 2.5 V ≤ VCC ≤ 5.5V 1.7V ≤ VCC < 2.5V 24FC128 2.5 V ≤ VCC ≤ 5.5V 24FC128 11 TSU:WP WP setup time 4000 600 600 — — — ns 1.7V ≤ VCC < 2.5V 2.5V ≤ VCC ≤ 5.5V 1.7V ≤ VCC ≤ 5.5V 24FC128 12 THD:WP WP hold time 4700 1300 1300 — — — ns 1.7V ≤ VCC < 2.5V 2.5V ≤ VCC ≤ 5.5V 1.7V ≤ VCC ≤ 5.5V 24FC128 Note 1: Not 100% tested. CB = total capacitance of one bus line in pF. 2: As a transmitter, the device must provide an internal minimum delay time to bridge the undefined region (minimum 300 ns) of the falling edge of SCL to avoid unintended generation of Start or Stop conditions. 3: The combined TSP and VHYS specifications are due to new Schmitt Trigger inputs, which provide improved noise spike suppression. This eliminates the need for a TI specification for standard operation. 4: This parameter is not tested but ensured by characterization. For endurance estimates in a specific application, please consult the Total Endurance™ Model, which can be obtained from Microchip’s web site at www.microchip.com. |
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