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24LCS21-/P Datasheet(PDF) 12 Page - Microchip Technology

No. de pieza 24LCS21-/P
Descripción Electrónicos  1K 2.5V Dual Mode I 2 C Serial EEPROM
PDF  24 Pages
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Fabricante Electrónico  MICROCHIP [Microchip Technology]
Página de inicio  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

24LCS21-/P Datasheet(HTML) 12 Page - Microchip Technology

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24LCS21
DS21127F-page 12
© 2005 Microchip Technology Inc.
FIGURE 7-2:
RANDOM READ
7.3
Sequential Read
Sequential reads are initiated in the same way as a
random read except that after the 24LCS21 transmits
the first data byte, the master issues an acknowledge
as opposed to a Stop condition in a random read. This
directs the 24LCS21 to transmit the next sequentially
addressed 8-bit word (Figure 8-1).
To provide sequential reads, the 24LCS21 contains an
internal Address Pointer which is incremented by one
at the completion of each operation. This Address
Pointer allows the entire memory contents to be serially
read during one operation.
7.4
Noise Protection
The 24LCS21 employs a VCC threshold detector circuit
which disables the internal erase/write logic if the VCC
is below 1.5 volts at nominal conditions.
The SDA, SCL and VCLK inputs have Schmitt Trigger
and filter circuits which suppress noise spikes to assure
proper device operation, even on a noisy bus.
Bus Activity
Master
SDA Line
Bus Activity
Control
Byte
Word
Address
Data n
A
C
K
S
T
A
R
T
N
O
S
T
A
R
Control
Byte
A
C
K
A
C
K
A
C
K
SS
T
P
S
T
O
P
10 1 0 0 0 00
0
0
0
0
01
1
1



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