M65KA512AB datasheet(14/55 Pages) STMICROELECTRONICS

No. de pieza	M65KA512AB

Descripción Electrónicos	512Mbit (4 Banks x 8M x 16), 133 MHz Clock Rate, Bare Die, 1.8 V Supply, Low Power SDRAM

PDF	55 Pages

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Fabricante Electrónico	STMICROELECTRONICS [STMicroelectronics]

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Operations

M65KA512AB

14/55

3.7

Deep Power-Down

The purpose of this mode is to achieve maximum power reduction by cutting the power

supply to the whole memory array. Data is no longer retained when the device enters Deep

Power-Down Mode.

All banks must be precharged before entering Deep Power-Down mode. The

M65KA512ABM65KA512AB enters Deep Power Down Mode by holding E and W Low with

RAS and CAS High at the rising edge of the clock, K, while driving KE Low (see Figure 26:

Deep Power-Down Entry ac waveforms).

The M65KA512AB exits Deep Power-Down mode by asserting KE High. A special

sequence is then required before the device can take any new command into account:

Maintain No Operation status conditions for a minimum of 200µs,

Issue a Precharge command to all banks of the device (see Section 4.6: Precharge

command for details),

Issue a Mode Register Set command to initialize the Mode Register bits,

Issue an Extended Mode Register Set command to initialize the Extended Mode

Issue 2 or more Auto Refresh commands.

The Deep Power-Down mode exit sequence is illustrated in Figure 27: Deep Power-Down

Exit ac waveforms.

Note:

The 2 Auto Refresh commands can be issued either after or before the configuration of the

Mode and Extended Mode Registers.

M65KA512AB Datasheet(PDF) 14 Page - STMicroelectronics