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SST26VF032B-104I/SM Datasheet(PDF) 27 Page - Microchip Technology

No. de pieza SST26VF032B-104I/SM
Descripción Electrónicos  2.5V/3.0V 32-Mbit Serial Quad I/O™ (SQI™) Flash Memory
PDF  82 Pages
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Fabricante Electrónico  MICROCHIP [Microchip Technology]
Página de inicio  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

SST26VF032B-104I/SM Datasheet(HTML) 27 Page - Microchip Technology

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 2013-2022 Microchip Technology Inc. and its subsidiaries
DS20005218K-page 27
SST26VF032B/SST26VF032BA
5.19
Chip Erase
The Chip Erase instruction clears all bits in the device
to ‘1.’ The Chip Erase instruction is ignored if any of the
memory area is protected. Prior to any write operation,
execute the WREN instruction.
To execute a Chip Erase operation, the host drives CE#
low, sends the Chip Erase command cycle (C7H), then
drives CE# high. Poll the BUSY bit in the STATUS reg-
ister, or wait TSCE, for the completion of the internal,
self-timed, Write operation. See Figure 5-23 and
Figure 5-24 for the Chip Erase sequence.
FIGURE 5-23:
CHIP-ERASE SEQUENCE (SQI)
FIGURE 5-24:
CHIP-ERASE SEQUENCE (SPI)
Note:
C[1:0] = C7H
MODE 3
0
1
SCK
SIO[3:0]
CE#
C1 C0
MODE 0
CE#
SO
SI
SCK
01 2 3 4 5 6 7
C7
High-Impedance
MODE 0
MODE 3
MSB



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