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MPC880CZP133 Datasheet(PDF) 70 Page - Freescale Semiconductor, Inc |
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MPC880CZP133 Datasheet(HTML) 70 Page - Freescale Semiconductor, Inc |
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70 / 92 page  MPC885/MPC880 Hardware Specifications, Rev. 3 70 Freescale Semiconductor UTOPIA AC Electrical Specifications Figure 70 shows signal timings during UTOPIA receive operations. Figure 70. UTOPIA Receive Timing Table 32. UTOPIA Slave (Split Bus Mode) Electrical Specifications Num Signal Characteristic Direction Min Max Unit U1 UtpClk rise/fall time (external clock option) Input 4 ns ns Duty cycle 40 60 % Frequency 33 MHz U2 UTPB, SOC, Rxclav and Txclav active delay Output 2 ns 16 ns ns U3 UTPB_AUX, SOC_Aux, RxEnb, TxEnb, RxAddr, and TxAddr setup time Input 4 ns ns U4 UTPB_AUX, SOC_Aux, RxEnb, TxEnb, RxAddr, and TxAddr hold time Input 1 ns ns UtpClk UTPB RxEnb U1 3 2 SOC 4 RxClav PHREQn 3 4 High-Z at MPHY High-Z at MPHY U1 U2 U3 U4 U4 U3 U2 |
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