MPC5553 datasheet(34/66 Pages) FREESCALE

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MPC5553 Microcontroller Data Sheet, Rev. 2.0

Electrical Characteristics

Freescale Semiconductor

Input signal valid to CLKOUT

positive edge (setup time)

External bus interface

ADDR[8:31]

BDIP

DATA[0:31]

RD_WR

TEA

WE/BE[0:3]

tCIS

10.0

—7.0

—5.0

—

Input signal valid to CLKOUT

positive edge (setup time)

Calibration bus interface

CAL_ADDR[10:11, 27:30]

CAL_CS[0, 2:3]

CAL_DATA[0:15]

CAL_WE/BE[0:1]

tCCIS

11.0

—8.0

—6.0

—

CLKOUT positive edge to

input signal invalid (hold time)

External bus interface

ADDR[8:31]

BDIP

DATA[0:31]

RD_WR

TEA

WE/BE[0:3]

tCIH

1.0

—

1.0

—

1.0

—

Calibration bus interface

CAL_ADDR[10:11, 27:30]

CAL_CS[0, 2:3]

CAL_DATA[0:15]

CAL_WE/BE[0:1]

tCCIH

1.0

—

1.0

—

1.0

—

1 EBI timing specified at V

DD = 1.35–1.65 V, VDDE = 1.6–3.6 V (unless stated otherwise),

VDD33 and VDDSYN = 3.0–3.6 V, TA = TL to TH, and CL = 30 pF with DSC = 0b10.

2 The external bus is limited to half the speed of the internal bus.

3 Refer to fast pad timing in Table 17 and Table 18 (different values for 1.8 V and 3.3 V).

4 The EBTS = 0 timings are tested and valid at V

DDE = 2.25–3.6 V only,

whereas EBTS = 1 timings are tested and valid at VDDE = 1.6–3.6 V.

5 The EBTS = 0 timings are tested and valid at V

DDE = 2.25–3.6 V only,

whereas EBTS = 1 timings are tested and valid at VDDE = 1.6–3.6 V.

Table 22. Bus Operation Timing1 (continued)

Spec

Characteristic

and

Description

Symbol

40 MHz

(ext. bus)2

56 MHz

(ext. bus)2

66 MHz

(ext. bus)2

Unit

Notes

Min

Max

Min

Max

Min

Max

MPC5553 Datasheet(PDF) 34 Page - Freescale Semiconductor, Inc

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