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MPC5200CVR400B Datasheet(PDF) 74 Page - Freescale Semiconductor, Inc

No. de pieza MPC5200CVR400B
Descripción Electrónicos  SDRAM/DDR Memory Controller
PDF  78 Pages
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Fabricante Electrónico  FREESCALE [Freescale Semiconductor, Inc]
Página de inicio  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

MPC5200CVR400B Datasheet(HTML) 74 Page - Freescale Semiconductor, Inc

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MPC5200B Data Sheet, Rev. 1
System Design Information
Freescale Semiconductor
74
Figure 54. COP Connector Diagram
5.4.2.2
Boards Without COP Connector
If the JTAG interface is not used, JTAG_TRST should be tied to PORRESET, so that it is asserted when
the system reset signal (PORRESET) is asserted. This ensures that the JTAG scan chain is initialized
during power on. Figure 55 shows the connection of the JTAG interface without COP connector.
1
3
5
7
9
11
13
15
2
4
6
8
10
12
K
16
Key
Key 14
HRESET
SRESET
VDD
VDD
JTAG_TRST
VDD
JTAG_TMS
VDD
JTAG_TCK
VDD
JTAG_TDI
TEST_SEL_0
JTAG_TDO
3
11
16
4
9
12
7
6(2)
15
1
10
8
5(3)
2(4)
13
NC
NC
NC
NC
TDO
HRESET
SRESET
TRST
TMS
TCK
TDI
CKSTP_OUT
VDD
10Kohm
10Kohm
10Kohm
10Kohm
10Kohm
COP Header
COP Connector
Physical Pinout
halted
qack
MPC5200B
VDD
10Kohm
PORRESET
PORRESET



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