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PCF8812U/2 Datasheet(PDF) 20 Page - NXP Semiconductors |
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PCF8812U/2 Datasheet(HTML) 20 Page - NXP Semiconductors |
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20 / 36 page  2000 Nov 22 20 Philips Semiconductors Product specification 65 × 102 pixels matrix LCD driver PCF8812 13 DC CHARACTERISTICS VDD = 2.5 to 5.5 V; VSS =0V; VLCD = 4.5 to 9.0 V; Tamb = −40 to +85 °C; unless otherwise specified. SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT VDD1 supply voltage +2.5 − +5.5 V VDD2,VDD3 supply voltage for internal voltage generator LCD voltage internally generated (voltage generator enabled) +2.5 − +4.5 V VLCDIN LCD input supply voltage LCD voltage externally supplied (voltage generator disabled) +4.5 − +9.0 V VLCDOUT LCD output supply voltage LCD voltage internally generated (voltage generator enabled); note 1 +4.5 − +9.0 V IDD(tot) total supply current normal mode; VDD1 = 2.8 V; VLCD = 7.6 V; fSCLK =0; Tamb =25 °C; no display load; 4 × charge pump; notes 2 and 3 − 220 350 µA Power-down mode; with internal or external VLCD supply voltage; note 4 − 1.5 −µA ILCDIN supply current from external VLCD VDD1 = 2.8 V; VLCD = 7.6 V; fSCLK = 0; T = 25 °C; no display load; notes 2, 3 and 5 − 30 −µA Logic VIL LOW-level input voltage VSS − 0.3VDD V VIH HIGH-level input voltage 0.7VDD − VDD V IIL input leakage current VI =VDD1 or VSS1 −1 − +1 µA Column and row outputs Rcol column output resistance COL 0 to COL 101 IL =10 µA outputs tested one at a time − 12 20 k Ω Rrow row output resistance ROW 0 to ROW 64 IL =10 µA outputs tested one at a time − 12 20 k Ω Vbias(col) column bias tolerance COL 0 to COL 101 −100 0 +100 mV Vbias(row) row bias tolerance ROW 0 to ROW 64 −100 0 +100 mV |
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