AT90USB1286 datasheet(21/435 Pages) ATMEL

21 / 435 page

7593D–AVR–07/06

AT90USB64/128

An optional external data SRAM can be used with the AT90USB64/128. This SRAM will occupy

an area in the remaining address locations in the 64K address space. This area starts at the

address following the internal SRAM. The Register file, I/O, Extended I/O and Internal SRAM

occupies the lowest 4,608/8,704 bytes, so when using 64KB (65,536 bytes) of External Memory,

60,478/56,832 Bytes of External Memory are available. See “External Memory Interface” on

page 30 for details on how to take advantage of the external memory map.

When the addresses accessing the SRAM memory space exceeds the internal data memory

locations, the external data SRAM is accessed using the same instructions as for the internal

data memory access. When the internal data memories are accessed, the read and write strobe

pins (PE0 and PE1) are inactive during the whole access cycle. External SRAM operation is

enabled by setting the SRE bit in the XMCRA Register.

Accessing external SRAM takes one additional clock cycle per byte compared to access of the

internal SRAM. This means that the commands LD, ST, LDS, STS, LDD, STD, PUSH, and POP

take one additional clock cycle. If the Stack is placed in external SRAM, interrupts, subroutine

calls and returns take three clock cycles extra because the three-byte program counter is

pushed and popped, and external memory access does not take advantage of the internal pipe-

line memory access. When external SRAM interface is used with wait-state, one-byte external

access takes two, three, or four additional clock cycles for one, two, and three wait-states

respectively. Interrupts, subroutine calls and returns will need five, seven, or nine clock cycles

more than specified in the instruction set manual for one, two, and three wait-states.

The five different addressing modes for the data memory cover: Direct, Indirect with Displace-

ment, Indirect, Indirect with Pre-decrement, and Indirect with Post-increment. In the Register file,

registers R26 to R31 feature the indirect addressing pointer registers.

The direct addressing reaches the entire data space.

The Indirect with Displacement mode reaches 63 address locations from the base address given

by the Y- or Z-register.

When using register indirect addressing modes with automatic pre-decrement and post-incre-

ment, the address registers X, Y, and Z are decremented or incremented.

The 32 general purpose working registers, 64 I/O registers, and the 8,192 bytes of internal data

SRAM in the AT90USB64/128 are all accessible through all these addressing modes. The Reg-

ister File is described in “General Purpose Register File” on page 13.

AT90USB1286 Datasheet(PDF) 21 Page - ATMEL Corporation