LTC6079IGN datasheet(10/20 Pages) LINER

10 / 20 page

LTC6078/LTC6079

60789fa

APPLICATIO S I FOR ATIO

PC Board Layout

Mechanical stress on a PC board and soldering-induced

stress can cause the VOS and VOS drift to shift. The DD

and DHC packages are more sensitive to stress. A simple

way to reduce the stress-related shifts is to mount the IC

near the short edge of the PC board, or in a corner. The

board edge acts as a stress boundary, or a region where

the ﬂexure of the board is minimum. The package should

always be mounted so that the leads absorb the stress and

not the package. The package is generally aligned with the

leads paralled to the long side of the PC board.

The most effective technique to relieve the PC board stress

is to cut slots in the board around the op amp. These slots

can be cut on three sides of the IC and the leads can exit on

the fourth side. Figure 3 shows the layout of a LTC6078DD

with slots at three sides.

Figure 3. Vertical Orientation of LTC6078DD with Slots

60789 F03

LONG DIMENSION

SLOTS

Simpliﬁed Schematic of the Ampliﬁer

V+

V–

OUT

60789 SS

V+

V–

OUTPUT

CONTROL

VBIAS

–IN

V+

V–

V+

V–

+IN

V–

M11

M10

µA

V+

V–

SHDN

BIAS

GENERATION

NOTE: SHDN IS ONLY AVAILABLE

IN THE DFN10 PACKAGE

SCHE ATIC

SI PLIFIED

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