ST10F276 datasheet(54/229 Pages) STMICROELECTRONICS

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Bootstrap loader

ST10F276

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Figure 9.

UART bootstrap loader sequence

5.3.2

Entering bootstrap via UART

The ST10F276 enters BSL mode if pin P0L.4 is sampled low at the end of a hardware reset.

In this case, the built-in bootstrap loader is activated independently of the selected bus

mode. The bootstrap loader code is stored in a special Test-Flash; no part of the standard

mask ROM or Flash memory area is required for this.

After entering BSL mode and the respective initialization, the ST10F276 scans the RxD0

line to receive a zero byte, that is, 1 start bit, eight ‘0’ data bits and 1 stop bit. From the

duration of this zero byte, it calculates the corresponding baud rate factor with respect to the

current CPU clock, initializes the serial interface ASC0 accordingly and switches pin TxD0 to

output. Using this baud rate, an acknowledge byte is returned to the host that provides the

loaded data.

The acknowledge byte is D5h for the ST10F276.

RSTIN

TxD0

Int. Boot ROM / Test-Flash BSL-routine

32 bytes

RxD0

CSP:IP

user software

P0L.4

1) BSL initialization time, > 1ms @ fCPU = 40 MHz.

2) Zero byte (1 start bit, eight ‘0’ data bits, 1 stop bit), sent by host.

3) Acknowledge byte, sent by ST10F276.

4) 32 bytes of code / data, sent by host.

5) Caution: TxD0 is only driven a certain time after reception of the zero byte (1.3ms @ fCPU = 40 MHz).

6) Internal Boot ROM / Test-Flash.

ST10F276 Datasheet(PDF) 54 Page - STMicroelectronics